Bench Talk

(Source: Pannee/stock.adobe.com; generated with AI)

As modern-day electronic devices continue to shrink and become more powerful, the lines between nanotechnology and semiconductor technology become more blurred. This is especially true when it comes to the fabrication techniques used in both industries. Many nanotechnology fabrication techniques on both the deposition and patterning side create nanomaterials, deposit nanomaterials on a surface, and pattern specific features into the nanoscale surface. Developers use these techniques to produce nanomaterials that are conducting, semiconducting, and insulating, including nanomaterials with layered structures that encompass some or all these properties.

With the increasing demands to miniaturize electronic devices, nanoscale fabrication techniques have become even more consequential in developers’ attempts to scale down chip size. Semiconductor chips can now be produced at the low end of the nanoscale region—a few to several nanometers—using the latest nanoscale fabrication techniques. As these techniques become more efficient, chips become smaller. The downstream processing steps, such as chip cutting, molding, and packaging, remain the same regardless of the fabrication techniques used, and many nanofabrication techniques have become standard in semiconductor fabrication lines. In this blog, we highlight the main nanofabrication techniques crucial to creating advanced semiconductor materials and miniaturized electronic devices.

Deposition Techniques

The range of deposition techniques available to developers is vast. Advances in building up small components from scratch via bottom-up deposition techniques and reducing bulkier materials into smaller surfaces via top-down techniques have been helping to create smaller electronics for years. These bottom-up deposition techniques can build nanoscale and single-atom layers of materials, resulting in incredibly small electronic devices. Here are some of the main deposition techniques used in the semiconductor industry today.

Chemical Vapor Deposition

Chemical vapor deposition (CVD) is one of the most versatile techniques for producing nanoscale surfaces for semiconductor devices—including semiconducting, conducting, and insulating layers that can be built on top of each other to create complete devices. CVD is also the technique that became popular in the nanotechnology industry for creating single layers of graphene. However, it can also be one of the most energy-intensive, depending on the type of CVD used. While CVD can create highly conformal surfaces to cover complex chip surfaces, the high-temperature requirements of CVD can sometimes introduce defects that need to be accounted for. The CVD process introduces gas and vapor precursors into a vacuum chamber with a substrate. Using either a thermal or plasma-assisted approach, the gas reacts with the substrate and decomposes on top of it to create a solid thin film on top of the substrate, with the thickness regulated by the deposition time and gas concentration.

There are many different variations of CVD. Atmospheric pressure CVD, which is the standard CVD approach, requires process temperatures ranging from 1000°C to 1300°C. By comparison, plasma-enhanced CVD can process a small batch of wafers at low temperatures, ranging from 100°C to 400°C, because cold plasmas increase the temperature of the electrons in the precursor. Moreover, this energy can be used to dissociate the gas and form the thin film on the substrate without high temperatures. There is also low-pressure CVD, which uses pressures from 10Pa to 1000Pa and is capable of processing hundreds of wafers at a middle-ground temperature of 600°C to 900°C.

The common areas where CVD methods are currently used in the semiconductor industry include:

• fabricating integrated circuits (ICs),
• solar cell manufacturing (semiconductor junction),
• growing 3C and 6H silicon carbide (SiC) onto silicon wafers, and
• introducing n-type and p-type dopants into silicon-based films.

Metal-Organic Chemical Vapor Deposition

Another extension of CVD fabrication technology that is now more widely used in the semiconductor industry is metal-organic chemical vapor deposition (MOCVD). It has become the most important fabrication technique for III-V compound semiconductors, such as gallium nitride (GaN) and indium gallium nitride (InGaN). MOCVD produces higher quality films compared to traditional CVD, which is crucial for semiconducting chips with a lower defect tolerance.

In MOCVD, the gas precursors are passed over a heated wafer at temperatures between 400°C and 1300°C and decompose onto the surface of the wafer. MOCVD allows for different layers to be created by adjusting the precursors in the gas stream, making it easy to deposit different semiconductor layers onto the wafer. An example of MOCVD is a layered sequence of GaN and InGaN for blue and white LEDs.

Physical Vapor Deposition

Physical vapor deposition (PVD) is a technique that heats a solid material―such as a metal or metal alloy―and vaporizes it into a plasma inside a vacuum chamber. The conversion of solid material to plasma (vapor) can either be achieved by sputtering or evaporation methods. The vapor is then passed across the vacuum chamber before being deposited onto the wafer. Once the ions in the plasma contact the wafer, they condense and form a thin film on the surface of the wafer, with the thickness of the vapor being controlled by the deposition time, substrate temperature, and rate of material vaporization. While the conditions inside the high vacuum chamber can vary, the pressure typically ranges between 10^-2 and 10^-6 torr and between 50°C and 500°C.

PVD is used in the semiconductor industry because it provides precise control over thin film properties, and is a better option than CVD for depositing metals onto the wafer. These properties make it a better option for materials with higher melting points and lower reactivities. Because of this affinity towards metal and metal alloys, PVD is ideal for metal-based components, such as gold-based wire bonding, ohmic contacts, aluminum interconnects, bond pad metallization. However, PVD can also be used to create different silicon-based insulating layers for wafers as well, including silicon dioxide gate dielectrics and interlayer dielectrics in metal-oxide-semiconductor (MOS) devices and silicon nitride barrier layers to stop the diffusion of metals into the silicon wafer substrate.

Atomic Layer Deposition

Atomic layer deposition (ALD) is another variation of CVD, but instead of all the precursor reactants going into the reaction at the same time, the reactants in ALD enter the reaction chamber sequentially, and multiple reactants are never present at the same time. Like CVD, gaseous precursors grow on the surface of the wafer―using either heat or plasma as the reaction’s energy source―and the reactants are deposited layer-by-layer until all the surface sites have reacted. When one layer has been completed, new reactants are added, so it provides a much better degree of control for building different layers on chips, including depositing both conducting and insulating layers into specific arrangements.

The layer-by-layer method gives a high degree of control over the thickness of a film, as the reaction can stop after a layer has been deposited and provides a uniform deposition over a range of geometries, including spherical and non-conventional geometries. There are many areas of semiconductor manufacturing where ALD is beneficial, including:

• Fabricating high-κ oxide layers for use as gate insulators to stop quantum tunneling effects in transistors.
• Conductive metal layers for interconnects, seed layers, memory capacitors, and dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs).
• Transition metal nitrides that protect copper interconnects from diffusion.
• Other barrier layers that project wafer components from mechanical stress, moisture, and contaminants.

Patterning Techniques

Alongside the deposition of nanoscale layers, providing nanoscale features that improve the functionality and capabilities of semiconductor chips is also vitally important. Patterning is the primary approach for fabricating the small scale circuits on chips and printed circuit boards (PCBs). With today’s small semiconductor chips, only a certain number of patterning technologies can reach the required resolution to introduce even smaller features than these already small surfaces.

Photolithography

Photolithography has been used in the semiconductor industry for decades to print and pattern circuit designs onto a wafer and is the primary technique used in manufacturing integrated circuits. In photolithography, a polymer-based photosensitive layer, known as a photoresist, is applied to the wafer. A pattern is then projected on the photoresist using a mask. UV light is subsequently applied to the wafer and any areas that are not protected by the mask are chemically changed due to chemical reactions in the photoresist. This chemical change allows those areas to be etched away, leaving the protected areas on the surface of the substrate. Photolithography leads to a patterned surface on the wafer that creates nanoscale features on top of the wafer.

Nanoimprint lithography

Nanoimprint lithography (NIL) is a mechanical lithography process where a mold physically deforms a photoresist layer to pattern the surface of the wafer. This process does not require light and transfers the circuit pattern mechanically using the mask, which is also the mold with a pre-defined pattern. In NIL, droplets of a polymer photoresist—polymer particles, cross linkers, and photoactive compounds—are deposited onto the wafer’s surface based on the intended pattern. The mask has a defined geometry and is pressed like a stamp onto the photoresist droplets to create a pattern on the surface of the wafer. Ultraviolet (UV) light is then used to cure the polymer resin to create a solid pattern on the surface of the wafer before removing the mask. NIL has a high throughput and resolution and is used to create patterned features below 100nm, sometimes down to 10nm.

Extreme Ultraviolet Lithography

Extreme ultraviolet lithography (EUVL) is an extension of photolithography with more advanced capabilities. It is still an up-and-coming technique and is only used in a few instances because the upfront costs are much higher than other lithography techniques. In time, it should become a much more widely used technique when the price comes down.

EUVL is a more efficient lithography technique that uses light in the extreme ultraviolet (EUV) region, with wavelength widths of 13.5nm. The shorter wavelengths allow smaller patterns to be printed, meaning that EUVL can create much smaller features on the surface of the wafer. These wavelengths of light do not occur naturally, so high-powered lasers are required to generate this light. Like other lithography techniques, the laser light is precisely projected and printed onto the mask with a specific design.

EUVL systems are more complex and require the use of ultra-flat mirrors, multilayer-reflective optics, a high vacuum environment, and a hot 20eV–50eV plasma to produce the EUV light; hence, it is more expensive. While the physical process is practically the same as other lithography techniques, the optics are larger, allowing a shallower focus to be achieved that increases the resolution of the process.

Another challenge for EUVL to overcome as it develops is the energy requirements. Currently, it is an energy-intensive process that requires around 200W of power for 125 wafers—with sizes of 300mm—per hour. However, the increased resolution means that it’s much easier to create features 10nm or lower compared to other lithography techniques, which will be crucial in the future for fabricating smaller and smaller features and components on chips. To date, there have been cases of creating features only 2nm in size, but multiple exposures to the EUV light are required to achieve this. Still, these cases show the potential to use EUVL to meet the growing miniaturization requirements of the semiconductor industry.

Conclusion

Fabrication techniques that create and manipulate materials at the nanoscale are at the heart of semiconductor manufacturing. Deposition and patterning technologies are crucial to creating advanced semiconductor materials and miniaturized electronic devices. A number of technologies have become a standard approach in the semiconductor industry. However, as new technologies, such as EUVL, become more advanced and commercially feasible in more semiconductor foundries, we will begin to see the development of even smaller semiconductor chips.